Open SoC Debug
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The Open SoC Debug Specification
Preface
Introduction
Open SoC Debug Architecture
Data Exchange Formats
Programmer Interface
Component Architecture
System Architecture
Core Debug Modules
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The Open SoC Debug Specification
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The Open SoC Debug Specification
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Contents
Preface
About this specification
Conventions
Terms
Introduction
Open SoC Debug Architecture
Architecture Overview
Data Exchange Formats
Introduction
General Considerations
The Debug Packet
Programmer Interface
Debug Module Base Register Map
Component Architecture
Debug Interconnect
Debug Modules
System Architecture
Implementation Aspects
Physical Interfaces
Core Debug Modules
Host Interface Module (HIM)
Subnet Control Module (SCM)
Host Authentication Module (HAM)
Memory Access Module (MAM)
Software Trace Module (STM)
Core Debug Module (CDM)
Core Trace Module (CTM)
UART Device Emulation Module (DEM-UART)
Revision History
Preview 2 (to be released)
Preview 1 (released 2016-02-01)